Through Silicon Vias

Through-silicon vias (TSVs) is an advanced 3D interconnect technology and a crucial component to make 3D integration packaging possible. TSVs vertically interconnect die stacks which results in improved electrical performance (such as high conductivity and low RC delay), lesser power consumption, and form factor for 3D integrated circuits.
Similarly, TSVs allow the integration of heterogeneous die that use different process nodes and different manufacturing technologies. TSVs significantly increase the bandwidth between the logic chip and the memory (especially with wide memory interfaces) which cannot be achieved with conventional bond wires. However, there are concerns about the reliability of TSVs; it has been proven that thermal cycling/annealing can induce mechanical failure in TSVs. The differences in thermal expansion coefficients between Cu and the Si wafer lead to considerable thermal stress that have an impact on the device performance. Cu extrusion induced by thermal stress can cause both TSVs and adjacent interconnect structures to fail.

TESCAN can provide the semiconductor and packaging industries with a diverse range of systems and detectors to implement analytical techniques to study stress levels and Cu extrusion in TSVs. Our range of high performance SEMs (MIRA3, MAIA3) allows for high and ultra high resolution imaging of TSV extrusion and physical inspection on its cross-section. Dual beam systems allow for pinpointing failure sites and a subsequent local inspection and characterisation of these failure sites with a single instrument. TESCAN Xe plasma FIB-SEM systems (FERA3 and XEIA3) offer the essential power and speed for performing high-throughput analysis in TSVs.
  • TSVs range from 50 to 100 μm in length and 15 to 30 μm in diameter and usually are arranged in arrays (which could be over 500 µm), therefore cross-sectioning these structures can be challenging with conventional Ga ion sources.
  • Large cross-sectioning make it possible to find and examine voids, delamination, cracks, and other defects present in TSVs.
  • EDX and EBSD mapping analyses can be implemented to study the Cu microstructure and different grain size distributions in TSVs.
  • Xe plasma FIB induces less amorphous damage compared to Ga, which is an advantage for EBSD analysis.
Through Silicon Vias
Large area cross-section of a 3D IC showing 5 Cu TSVs and Cu bump contact in silicon. The cross-section was prepared in less than one hour using Xe plasma FIB