Artefact-free top-down TEM sample preparation of a 14 nm FinFET device

Mar/21/2017
Check out this new application example!

 
Find out how to prepare curtaining-free high-quality lamellae from semiconductor devices.

In this application note a new method of top-down lamella preparation in a Ga FIB-SEM machine is shown. Curtaining artifacts are mitigated due to the alternation of the ion incidence angle by tilting the sample mounted on a Rocking stage.

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Artefact-free top-down TEM sample preparation of a 14 nm FinFET device
Artefact-free lamella preparation by FIB is crucial for successful TEM analysis. One of the difficulties one faces during the preparation of such specimens is the appearing of curtaining; surface artefacts that arise when polishing a sample which consists of different materials, each with different milling rates.
pdf – 1.2 MB

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